Research

The Spark lab's mission is to build secure systems through novel architectures with help from operating systems and compilers.

Security work today is spread across the entire stack as well as across mobile devices and cloud servers. Increasingly sensitive programs will shortly run on shiny new hardware that promise to beat Dennard-scaling hurdles but have never met a threat model. All to say, this is a good time for computer architects and systems researchers to jump in.

Spark lab's current projects build a new security-plane for distributed applications. Our projects include building a new instruction-set (ISA) and micro-architecture that translates program-layer security properties into hardware implementations, and a container-orchestrator and compiler that maps distributed web- and micro-services on to our security-ISA. For example, one series of work has been to build hardware boxes that do not leak information, and then use this to put data into boxes instead of applications.

One near-term outcome of our research is to put users back in control of their own data, even if their data is computed on by untrusted applications and infrastructure. In the long term, we'll be on Mars and leave all non-secure computers here.

Awards

Best Paper Award, HASP 2024
Qualcomm Innovation Fellowship (North America) 2022
Top Picks in Hardware and Embedded Security, HSTTC 2021
Best Paper Nominee, HOST 2019
Qualcomm Faculty Award, 2018
Finalist, CSAW Applied Research Competition, 2018
Best Paper Runner-Up, HOST 2018
AMD Chair, Department of ECE, UT Austin, 2017-19
Qualcomm Faculty Award, 2017
Best Paper Award, ASPLOS 2015
NSF Career Award, January 2015
IEEE Micro Top Pick, Honorable Mention, January-February 2015
Google Faculty Research Award, 2013-14
Top 10 shortlist for NYU-Poly Best Applied Security Paper Award, 2013.

Publications

Arxiv'24
ConfusedPilot: Confused Deputy Risks in RAG-based LLMs
Ayush RoyChowdhury, Mulong Luo, Prateek Sahu, Sarbartha Banerjee, Mohit Tiwari Arxiv Preprint (Arxiv), Oct 2024.

Arxiv'24
Obsidian: Cooperative State-Space Exploration for Performant Inference on Secure ML Accelerators
Sarbartha Banerjee, Shijia Wei, Prakash Ramrakhyani, Mohit Tiwari Arxiv Preprint (Arxiv), Sep 2024.

SEED'24
Tail Victims in Termination Timing Channel Defenses beyond Cryptographic Kernels
Shijia Wei, Austin Harris, Yongye Zhu, Prakash Ramrakhyani, Calvin Lin, Mohit Tiwari in Proceedings of the 2024 International Symposium on Secure and Private Execution Environment Design (SEED), May 2024, Orlando, Florida, USA.

ICLR'24
NeuroBack: Improving CDCL SAT Solving using Graph Neural Networks
Wenxi Wang, Yang Hu, Mohit Tiwari, Sarfraz Khurshid, Ken McMillan, Risto Miikkulainen in Proceedings of the Twelfth International Conference on Learning Representations (ICLR), May 2024, Vienna, Austria.

ASE'23
Fixing Privilege Escalations in Cloud Access Control with MaxSAT and Graph Neural Networks
Yang Hu*, Wenxi Wang*, Sarfraz Khurshid, Ken McMillan, Mohit Tiwari in Proceedings of the 38th IEEE/ACM International Conference on Automated Software Engineering (ASE), September 2023, Kirchberg, Luxembourg.

USENIX'23
Rethinking System Audit Architectures for High Event Coverage and Synchronous Log Availability
Varun Gandhi*, Sarbartha Banerjee*, Aniket Agrawal, Adil Ahmad, Sangho Lee, Marcus Peinado in Proceedings of the 32nd Usenix Security Symposium (USENIX), August 2023, Anaheim, California, USA.

ACSAC'22
Spacelord: Private and Secure Smart Space Sharing
Yechan Bae*, Sarbartha Banerjee*, Sangho Lee*, Marcus Peinado* in Proceedings of the 38th Conference on Annual Computer Security Applications (ACSAC), December 2022, Austin, Texas, USA.

CAL'22
Revisiting Browser Performance Benchmarking From an Architectural Perspective
Yongye Zhu, Shijia Wei, Mohit Tiwari in IEEE Computer Architecture Letters, vol. 21, no. 2, pp. 113-116 (CAL), 1 July-Dec. 2022.

IJCAI/ECAI'22
Using Constraint Programming and Graph Representation Learning for Generating Interpretable Cloud Security Policies
Mikhail Kazdagli, Mohit Tiwari, Akshat Kumar in Proceedings of the 31st International Joint Conference on Artificial Intelligence (IJCAI), July 2022, Messe Wien, Vienna, Austria.

DSN'22
Back to the future: N-Versioning of Microservices
Antonio M. Espinoza, Riley Wood, Stephanie Forrest, Mohit Tiwari in Proceedings of the 52nd International Conference on Dependable Systems and Networks (DSN), June 2022, Baltimore, MD, USA.

HOST'21
Morpheus II: A RISC-V Security Extension for Protecting Vulnerable Software and Hardware
Austin Harris, Tarunesh Verma, Shijia Wei, Alex Kisil, Misiker Tadesse Aga, Valeria Bertacco, Baris Kasikci, Mohit Tiwari, Todd Austin in Proceedings of IEEE International Symposium on Hardware Oriented Security and Trust (HOST), December 2021, Washington D.C., USA.

ESEC/FSE'21

ACHyb: A Hybrid Analysis Approach to Detect Kernel Access Control Vulnerabilities

in Proceedings of the 29th ACM Joint European Software Engineering Conference and Symposium on the Foundations of Software Engineering

ASPLOS'21
Speculative interference attacks: breaking invisible speculation schemes
Mohammad Behnia, Prateek Sahu, Riccardo Paccagnella, Jiyong Yu, Zirui Neil Zhao, Xiang Zou, Thomas Unterluggauer, Josep Torrellas, Carlos Rozas, Adam Morrison, Frank Mckeen, Fangfei Liu, Ron Gabor, Christopher W. Fletcher, Abhishek Basak, and Alaa Alameldeen in Proceedings of the 26th ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), April 2021, Virtual, USA.

Arxiv'20
Sesame: Software Defined Enclaves to Secure Inference Accelerators with Multi-tenant Execution
Sarbartha Banerjee, Prakash Ramrakhyani, Shijia Wei, Mohit Tiwari Arxiv Preprint (Arxiv), July 2020.

MICRO'19
Cyclone: Detecting Contention-Based Cache Information Leaks Through Cyclic Interference.
Austin Harris*, Shijia Wei*, Prateek Sahu, Pranav Kumar, Todd Austin, Mohit Tiwari, in Proceedings of the 52nd International Symposium on Microarchitecture (MICRO), October 2019, Columbus, OH.

HOST'19
Using Power-Anomalies to Counter Evasive Micro-Architectural Attacks in Embedded Systems.
Shijia Wei, Aydin Aysu, Michael Orshansky, Andreas Gerstlauer, Mohit Tiwari, in Proceedings of IEEE International Symposium on Hardware Oriented Security and Trust (HOST), May 2019, Tysons Corner, USA. (Best Paper Candidate)

ASPLOS'19
Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn.
Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd Austin, in Proceedings of Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2019.

ASPLOS'19
Relaxed Hierarchical ORAM.
Chandrasekhar Nagarajan, Ali Shafiee, Rajeev Balasubramonian, Mohit Tiwari, in Proceedings of Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2019.

ASPLOS'18
DATS: Data Containers for Web Applications.
Casen Hunger, Lluis Vilanova, Charalampos Papamanthou, Yoav Etsion, Mohit Tiwari, in Proceedings of Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2018, Williamsburg, VA.

HOST'18
Horizontal Side-Channel Vulnerabilities of Post-Quantum Key Exchange Protocols.
Aydin Aysu, Youssef Tobah, Mohit Tiwari, Andreas Gerstlauer, Michael Orshansky, in Proceedings of IEEE Internation Symposium on Hardware Oriented Security and Trust (HOST), May 2018, Washington DC, USA. (Best Paper Runner-Up)

PETS'18 CSAW Best Applied Security Paper, Finalist
Power to peep-all: Inference Attacks by Malicious Batteries on Mobile Devices.
Pavel Lifshits, Roni Forte, Yedid Hoshen, Matthew Halpern, Manuel Philipose, Mohit Tiwari, Mark Silberstein in Journal of Privacy Enhancing Technologies Symposium

DATE'18
Binary Ring-LWE Hardware with Power Side-Channel Countermeasures.
Aydin Aysu, Andreas Gerstlauer, Michael Orshansky, Mohit Tiwari, in Proceedings of Design Automation and Test in Europe (DATE), March 2018, Dresden, Germany.

HPCA'18
Secure DIMM: Moving ORAM Primitives Closer to Memory.
Ali Shafiee, Rajeev Balasubramonian, Mohit Tiwari, Feifei Li, in Proceedings of High Performance Computer Architecture (HPCA), February 2018, Vienna, Austria.

MICRO'16
Quantifying and Improving the Efficiency of Hardware-based Mobile Malware Detectors.
Mikhail Kazdagli, Vijay Janapa Reddi, Mohit Tiwari, in Proceedings of the 49th International Symposium on Microarchitecture (MICRO), October 2016, Taipei, Taiwan.

USENIX'16
Secure, Precise, and Fast Floating-Point Operations on x86 Processors.
Ashay Rane, Calvin Lin, Mohit Tiwari, in Proceedings of the 25th Usenix Security Symposium (USENIX), August 2016, Austin, TX.

MICRO'15
Avoiding Information Leakage in the Memory Controller with Fixed Service Policies.
Ali Shafiee, Akhila Gundu, Manjunath Shevgoor, Rajeev Balasubramonian, Mohit Tiwari, in Proceedings of the 48th International Symposium on Microarchitecture (MICRO), December 2015, Waikiki, Hawaii.

USENIX'15
Raccoon: Closing Digital Side-Channels through Obfuscated Execution.
Ashay Rane, Calvin Lin, Mohit Tiwari, in Proceedings of the 24th Usenix Security Symposium (USENIX), August 2015, Washington D.C. Short Summary.

ASPLOS'15 Best Paper Award
GhostRider: A Hardware-Software System for Memory Trace Oblivious Computation.
Chang Liu, Austin Harris, Martin Maas, Michael Hicks, Mohit Tiwari, Elaine Shi, in Proceedings of the 15th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2015, Istanbul, Turkey.

HPCA'15
Understanding Contention-driven Covert Channels and Using Them for Defense.
Casen Hunger, Mikhail Kazdagli, Ankit Rawat, Alex Dimakis, Sriram Vishwanath, Mohit Tiwari, in Proceedings of the International Symposium on High Performance Computer Architecture (HPCA), February 2015.

ASPLOS'14 IEEE Micro Top Picks, Honorable Mention, January-February 2015.
Sapper: A Language for Hardware-Level Security Policy Enforcement.
Xun Li, Vineeth Kashyap, Jason Oberg, Mohit Tiwari, Vasanth Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, and Frederic Chong, in Proceedings of the 14th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), March 2014, Salt Lake City.

CCS'13 Shortlisted (top 10) for NYU-Poly AT&T Best Applied Security Paper Award, 2013
PHANTOM: Practical Oblivious Computation in a Secure Processor.
Martin Maas, Eric Love, Emil Stefanov, Mohit Tiwari, Elaine Shi, Krste Asanovic, John Kubiatowicz, Dawn Song, in Proceedings of the ACM Conference on Computer and Communications Security (CCS), November 2013, Berlin, Germany

Workshops

HASP'24 Best Paper Award
SoK Paper: Power Side-Channel Malware Detection
Alexander Cathis, Ge Li, Shijia Wei, Michael Orshansky, Mohit Tiwari, Andreas Gerstlauer in Proceedings of the 13th International Workshop on Hardware and Architectural Support for Security and Privacy (HASP), Nov 2024, Austin, Texas, USA.

HASP'23
Triton: Software-Defined Threat Model for Secure Multi-Tenant ML inference Accelerators
Sarbartha Banerjee, Shijia Wei, Prakash Ramrakhyani, Mohit Tiwari in the 12th IEEE/ACM International Workshop on Hardware and Architectural Support for Security and Privacy (HASP), October 2023, Toronto, Canada.

HotInfra'23
Sidecars on the Central Lane: Impact of Network Proxies on Microservices
Prateek Sahu, Lucy Zheng, Marco Bueso, Shijia Wei, Neeraja J. Yadwadkar, and Mohit Tiwari in Proceedings of the 2023 IEEE/ACM Workshop on Hot Topics in System Infrastructure (HotInfra), June 2023, Orlando, Florida, USA.

SPSL'21
Bandwidth Utilization Side-Channel on ML Inference Accelerators
Sarbartha Banerjee, Shijia Wei, Prakash Ramrakhyani, Mohit Tiwari in Proceedings of the 2021 IEEE/ACM Workshop on Secure and Private Systems for Machine Learning (SPSL), April 2021, Virtual.

HASP'14
Morpheus: Benchmarking Computational Diversity in Mobile Malware.
Mikhail Kazdagli, Ling Huang, Vijay Reddi, Mohit Tiwari in Workshop on Hardware and Architectural Support for Security and Privacy, held in conjunction with ISCA, 2014

HASP'14
Memory Bandwidth Reservation in the Cloud to Avoid Information Leakage in the Memory Controller.
Akhila Gundu, Gita Sreekumar, Ali Shafiee, Seth Pugsley, Hardik Jain, Rajeev Balasubramonian, Mohit Tiwari, in Workshop on Hardware and Architectural Support for Security and Privacy (HASP), held in conjunction with ISCA, 2014

CARL'13
A High-Performance Oblivious RAM Controller on the Convey HC-2ex Heterogeneous Computing Platform.
Martin Maas, Eric Love, Emil Stefanov, Mohit Tiwari, Elaine Shi, Krste Asanovic, John Kubiatowicz, Dawn Song, in Workshop on the Intersections of Computer Architecture and Reconfigurable Logic, 2013